The vast majority of electronic circuit assemblies in the world today utilize integrated circuit (IC) chips which have been housed in protective packages. These packages provide mechanical and sometimes thermal protection for the chips while also providing an intermediate level of interconnection between the chips and printed circuit boards. Years ago, package sizes were large compared to the size of chips. In part this was necessary because attainable feature sizes for printed circuit boards (PCB) were very large compared to those of chips. Over time, the ability to produce fine-featured circuit boards has improved and package sizes have correspondingly decreased relative to IC size. However, because of the needs to cut costs and reduce circuit size and improve performance, there has been a drive to develop circuit assembly methods which minimize the materials and processes which are required to yield a functional device.
One technique used to reduce circuit size and improve performance involves attaching IC devices directly to a substrate using perimeter or area arrays of solder balls mounted on the face of a chip. By inverting or “flipping” the chip such that the balls are placed in contact with pads on the substrate and passing the entire assembly through a solder reflow process, the IC may be metallurgically bonded to the substrate. Although flip-chip assembly technology was first pioneered over 30 years ago, it has been successfully exploited in only a few different segments of the electronics industry. The most notable examples of electronic products which have exploited flip-chip assembly include wristwatches, automotive sensors/controllers and mainframe computers. These applications are characterized by the need for either extremely compact circuit size (watches, automotive) or by extremely high computing power per unit volume (mainframes). This underscores the simple fact that by eliminating the intermediate IC package, flip-chip assembly provides the smallest possible footprint for silicon on the circuit board.
A primary reason why flip-chip technology has not enjoyed a more widespread use is because the methodology, as it has currently been developed, is extremely process and equipment intensive. As a result, flip-chip technology is expensive to implement and provides many opportunities for problems to arise. In addition, process and performance requirements of the applications have reached the limits of current materials.
Existing flip-chip technology utilizes chips for which solder has been pre-applied to the interconnection pads. The solder is normally either a 95Pb-5Sn or a 63Sn-37Pb alloy, and it is normally reflowed to form a nearly spherical “bump” prior to final board assembly.
A typical assembly process for flip-chip assembly involves the following steps: 1) flux paste is applied to the substrate bond pads; 2) the IC is aligned and placed on the substrate while the tackiness in the flux holds the chip in place; 3) the assembly is passed through the reflow oven and the solder melts and bonds metallurgically with the substrate pads; and 4) the sample is passed through a flux cleaning operation. Flux removal is normally done with solvent rinses. Originally it was required to use chlorinated solvents to remove the flux residues, but more recently improvements to the flux chemistry has permitted the use of more desirable solvents.
The finished flip-chip assembly must then maintain electrical continuity throughout the lifetime of the device as measured by accelerated tests such as thermal cycling and thermal shock. Mismatches of both the coefficient of thermal expansion (CTE) and the elastic modulus (E) between the silicon IC and the PCB generate high stresses in the contact joints when the circuit is passed through thermal excursions. These stresses can lead to solder joint fatigue failure after repeated temperature cycles, and this is a primary failure mechanism for flip-chip joints. This mechanism has limited the selection of substrate materials mainly to ceramic hybrid substrates such as Al2O3, which has high modulus and low CTE, properties similar to silicon. Even with ceramic substrates, flip-chip assembly is limited to applications with small dice.
During the last ten to fifteen years there has been increasing interest in learning how to apply this flip-chip assembly to both larger size die and also to a broader range of printed circuit substrates. Specifically the increased wiring densities available with today's organic based substrates makes them suitable low cost substitutes for ceramic substrates. However, the relatively high CTE of organic materials has slowed the implementation of flip-chip assembly on organic substrates due to the aforementioned failure mechanism. An important breakthrough has been the development of the underfill process. The underfill process uses a high modulus curable adhesive to fill the empty space between the solder balls under the chip so that the stress in the joint is shared by the adhesive and distributed more evenly across the entire interface as opposed to being concentrated at the perimeter balls. The use of an “underfill” adhesive as described above has enabled a flip-chip technology to be applied to a broader range of assemblies.
In current practice, underfill resin is applied as a liquid and is allowed to wick under the reflowed assembly via capillary action. Hence this type of encapsulation is often referred to as “Capillary Underfill”. The current procedure for applying and curing underfill resins is separate from and is appended to the overall process sequence described above. After the reflow and flux removal steps, it is necessary to: pre-dry the bonded assembly, preheat the bonded assembly (to aid the wick-under), dispense resin, allow resin to wick under the die, dispense again, and then cure. Currently available underfill resins can require cures of up to 2 hours at 150° C. The extra dispense steps are often needed in order to make sure that there is no entrapped air under the chip and also to provide a good fillet shape around the chip. Developing and maintaining good control over these types of material characteristics and dispensing processes is very difficult, and any imperfections will hurt the reliability of the solder joints. Also, although capillary underfill is still widely used, trends in IC design towards larger IC size and reduced pad pitch will result in increases in both required wicking times and in defect occurrences.
Recently, an alternative approach for applying underfill resin has been pursued in which the uncured liquid resin is actually dispensed prior to the chip placement. The liquid resin in this case is used in place of the aforementioned flux paste, and special adhesive formulations have been developed that are capable of providing fluxing action in the reflow oven before they begin to cure significantly. This type of material is often referred to as a “No-Flow Underfill” because of the elimination of the capillary flow step. Special adhesive formulations that are capable of providing some degree of a fluxing action as they cure in the reflow oven may be used. Because the resin is present on the board before the chip is placed, it is necessary to press the chip down into the resin and displace the resin from the contact sites. This approach is attractive in that it eliminates flux cleaning, dispensing and wicking steps. However, it has been shown that in order for this approach to work, the underfill resin must be unfilled. The inability to utilize fillers in the underfill resin with this approach is a constraint that is expected to limit its utility in dealing with large IC size and fine pitch. See, for example, U.S. Pat. No. 5,128,746, Shi et al., High Performance Underfills for Low-Cost Flipchip Applications, Proc. 3d Int'l Symp. On Adv. Packaging Materials, March 1997; Gamota et al., Advanced Flipchip Materials: Reflowable Underfill Systems, Proc. Pac. Rim ASME Int'l Intersociety Electronic and Photonic Packaging Conf., ASME, June 1997; Johnson et al., Reflow Curable Polymer Fluxes for Flipchip Assembly, Proc. Surface Mount Int'l 1997.
The choice of chemistry for the underfill adhesive is constrained by the processing and performance requirements stated above. For best fatigue performance, it is best to choose materials that have the highest modulus and lowest CTE over the temperature range of the thermal cycling. For polymers, this means a glass transition temperature (Tg) above anywhere from 125 to 170° C., depending on the application. By filling polymers with inorganic fillers such as SiO2 the CTE and modulus may be brought closer to that of silicon. However, to achieve CTE of less than 30 ppm per degrees Celsius in a polymer system, a filler loading of 50% by volume or higher is typically required. Such high filler loading raises the viscosity significantly. To achieve the required balance of processability and cured material properties, it is common to use epoxy resins with the lowest possible viscosity. Highly filled and cured to a high Tg, these materials are quite brittle when cured and have poor adhesion to polyimide and aluminum nitride passivation layers on the IC's. The optimization of an underfill adhesive system is, therefore, a necessary compromise between processing requirements and performance requirements. An improved flip-chip assembly process or construction which reduced or eliminated any of these materials constraints has the potential to significantly improve the reliability of flip-chip assembly through improved chemistry.
In review of the background, a reliable solder flip-chip method of IC interconnect on ceramic substrates is just beginning to be applied to organic substrates. Significant processing and materials challenges are slowing this technology in spite of strong demand from designers. The current flip-chip assembly process has too many steps, is too costly and is not extendable to future IC designs. A simplified flip-chip assembly process which reduces cost and demands from the underfill adhesive system will enable flip-chip assembly to become a more broadly attractive approach for circuit assembly.